This invention relates to a method for driving an active matrix LCD (Liquid Crystal Display) and a structure of the LCD suited for the method.
An active matrix LCD using TFT (Thin Film Transistors) can obtain a better quality image than a simple matrix LCD. FIG. 7 shows a schematic view of an LCD panel of an active matrix LCD system. This LCD panel comprises a scan line (i.e., gate bus) 1, TFT 2, an image signal line (i.e., data bus) 3 and a pixel electrode 4. The scan line 2 connects to a gate 2g of the TFT 2, and the image signal line 3 connects to a source (or drain) of the TFT 2. A drain (or source) connects to the pixel electrode 4 made of a transparent conductive film. These elements are arranged in a matrix on an array side substrate 6 by forming and etching films.
The LCD panel also comprises a counter electrode 7 that is a transparent conductive film formed on a counter side substrate 8. A color LCD panel further comprises color filters disposed on the counter side substrate 8 corresponding to each pixel. Voltage applied to a liquid crystal layer of each pixel via the TFT is varied according to the image signal. Thus, transparency of liquid crystal at each pixel changes so that an image is displayed in the LCD panel as a whole.
FIG. 8 shows an equivalent circuit of an active matrix LCD panel. An image signal is applied to image signal lines A1, A2, . . . An. A scan signal (i.e., gate signal) is applied to one of scan lines B1, B2, . . . Bm. Each intersection of these lines (m.times.n points) is provided with a TFT Q11, Q12, . . . Q1m, Q21, Q22, . . . Q2m, . . . Qn1, Qn2, . . . or Qnm. A gate of each TFT is connected to the scan line B1, B2, . . . and Bm. A source (or drain) of each TFT is connected to the image signal line. A drain (or source) of each TFT is connected to a pixel electrode that faces a counter electrode T holding a liquid crystal layer between the two electrodes.
A drive pulse, i.e., scan signal .PHI.1, .PHI.2, . . . .PHI.m is applied to a corresponding scan line B1, B2, . . . Bm, respectively. Each scan signal turns on the TFTs connected to the scan line to which the scan signal is applied. Image signals are then supplied to the image signal lines A1, A2, . . . An and are written into pixel electrodes via the TFTs that are turned on. The written state of each pixel is held until the next field when a new scan signal is applied. In this manner, every pixel is driven so that the entire LCD panel displays an image.
One method of driving such an LCD panel is written in Japanese Tokukaihei 2-157815. FIG. 9 shows waveforms of drive signals using this method (hereinafter called capacitively coupled driving method). A scan signal .PHI.k consists of four voltage levels, i.e., Vg for turning on the TFT, Voff for turning off the TFT, and compensation voltages Ve(+) and Ve(-). The compensation voltages Ve(+) and Ve(-) are applied alternately to scan lines (or lines for auxiliary capacitors). A relationship between an image signal voltage Vs and a liquid crystal voltage Vlc applied to a pixel is given by following two equations: EQU Vlc(+)=-Cgd.times.Vg/Ct+Vs(+)+Cs/Ct.times.Ve(-) (1) EQU Vlc(-)=Cgd.times.Vg/Ct-Vs(-)-Cs/Ct.times.Ve(+) (2)
where positive levels with respect to the counter electrode potential are represented by Vlc(+) and Vs(+), and negative levels with respect to the counter electrode potential are represented by Vlc(-) and Vs(-).
The liquid crystal voltage Vlc and the image signal voltage Vs alternate field by field. Cgd is a gate-drain capacitance of the TFT, Cs is an auxiliary capacitance provided to add capacitance to a liquid crystal capacitance Clc of each pixel, and Ct is a total capacitance of Cs, Clc and Cgd.
It is necessary to equalize voltages applied to the liquid crystal in every field. Therefore, supposing Vlc(+)=Vlc(-) and Vs(+)=Vs(-), the equation below is derived from the above two equations (1) and (2): EQU Ve(+)+Ve(-)=2.times.Cgd.times.Vg/Cs (3)
This equation means that a good image display without a flicker or an image sticking effect can be obtained by adjusting a center level of two compensation voltages Ve(+) and Ve(-) to Cgd.times.Vg/Cs (Proceeding 9th International Display Research Conference, 580-583 pp).
A bias voltage Vbias of the image signal voltage Vs is given by the following equation: EQU Vbias=(Cs/Ct).times.(Ve(+)+Ve(-))/2 (4)
Then, a signal level for an image signal IC can be minimized by setting a bias voltage Vbias in each field according to the following equation: EQU Vbias=(Cmax+Vth)/2 (5)
where Vth is a threshold voltage of the liquid crystal, and Vmax is a maximum drive voltage of the liquid crystal. In general, Ve(+) and Ve(-) are determined to satisfy above equations (3) and (4). As an example, supposing that Vs=Vc=12.5 volt, Voff=0 volt, Ve(+) and Ve(-) are adjustable to minimize a flicker, Clc=0.3 pF, Cgd=0.03 pF, Vmax=5 volt, and Vth=1 volt, then Ve(-) is -8.3 volt and Ve(+) is 4.3 volt.
The conventional capacitively coupled driving method mentioned above is easy to equalize an average level of the counter voltage applied to the counter electrode and an average level of the image signal voltage. Therefore, this conventional driving method has the advantage of obtaining a high quality display with little image sticking effect by optimizing two compensation voltages Ve(-) and Ve(+).
However, this method also has one major disadvantage in that the scan signal consists of four voltages, each requiring its own voltage sources to be supplied to a driver IC of scan lines. An increase in chip size results in increased cost and power consumption.